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ltc5584 1 5584f typical a pplica t ion fea t ures descrip t ion 30mhz to 1.4ghz iq demodulator with iip2 and dc offset control the ltc ? 5584 is a direct conversion quadrature demodu- lator optimized for high linearity receiver applications in the 30mhz to 1.4ghz frequency range. it is also usable in the 10mhz to 30mhz and 1.4ghz to 2ghz ranges with reduced performance. it is suitable for communications receivers where an rf signal is directly converted into i and q baseband signals with bandwidth of 530mhz or higher. the ltc5584 incorporates balanced i and q mix - ers, lo buffer amplifiers and a precision, high frequency quadrature phase shifter. in addition, the ltc5584 provides four analog control voltage interface pins for iip2 and dc offset correction, greatly simplifying system calibration. the high linearity of the ltc5584 provides excellent spur- free dynamic range for the receiver. this direct conversion demodulator can eliminate the need for intermediate fre- quency (if) signal processing, as well as the corresponding requirements for image filtering and if filtering. these i/q outputs can interface directly to channel-select filters (lpfs) or to baseband amplifiers. direct conversion receiver with iip2 and dc offset calibration a pplica t ions n i/q bandwidth of 530mhz or higher n high iip3: 31dbm at 450mhz, 28dbm at 900mhz n high iip2: 70dbm at 450mhz, 65dbm at 900mhz n user adjustable iip2 to >80dbm n user adjustable dc offset null n high input p1db: 13.1dbm at 900mhz n image rejection: 45db at 900mhz n noise figure: 9.9db at 450mhz 10db at 900mhz n conversion gain: 5.4db at 450mhz 5.7db at 900mhz n shutdown mode n operating temperature range (t c ): C40c to 105c n 24-lead 4mm 4mm qfn package n lte/w-cdma/td-scdma base station receivers n wideband dpd receivers n point-to-point broadband radios n high linearity direct conversion i/q receivers n image rejection receivers l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. a/d d/a d/a vga vga 5584 ta01a lpf rf + rf ? bpf lna bpf rf input lo en lo input enable lpf ip2 adjust dc offset i + i ? q + q ? 0 90 ip2 and dc offset cal ltc5584 v cc 5v ip2 adjust dc offset ip2 and dc offset cal d/a d/a a/d iip2 vs ip2i, ip2q trim voltage ip2i, ip2q (v) 0 iip2 (dbm) 90 100 110 0.8 0.9 5584 ta01b 80 70 50 0.2 0.4 0.6 0.1 1.0 0.3 0.5 0.7 60 130 120 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c f rf = 450mhz
ltc5584 2 5584f p in c on f igura t ion a bsolu t e maxi m u m r a t ings v cc supply voltage ................................... C 0.3v to 5.5v v cap voltage ................................................. v cc 0.05v i C , i + , q + , q C , cmi, cmq voltage ........ 2.5 v to v cc + 0.3v voltage on any other pin ................. C 0.3v to v cc + 0.3v lo + , lo C , rf + , rf C input power ........................... 2 0dbm rf + , rf C input dc voltage ........................ C0 .3v to 2.7v maximum junction temperature (t jmax ) ............. 150c o perating temperature range (t c ) (note 3) .................................................. C 40c to 105c storage temperature range .................. C 65c to 150c (note 1) 24 23 22 21 20 19 7 8 9 top view 25 gnd uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 ip2q dcoq dcoi ip2i rf + rf ? cmq v cap lo ? lo + gnd gnd ref i + i ? q + q ? cmi en gnd v bias v cc edc eip2 t jmax = 150c, v jc = 7c/w exposed pad (pin 25) is gnd, must be soldered to pcb e lec t rical c harac t eris t ics t c = 25c, v cc = 5v, en = 5v, edc = eip2 = 0v, ref = ip2i = ip2q = dcoi = dcoq = 0.5v, p rf = C5dbm (C5dbm/tone for 2-tone iip2 and iip3 tests), p lo = 6dbm, unless otherwise noted. (notes 2, 3, 5, 6, 9) o r d er i n f or m a t ion lead free finish tape and reel part marking package description temperature range ltc5584iuf#pbf ltc5584iuf#trpbf 5584 24-lead (4mm x 4mm) plastic qfn C40c to 105c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ symbol parameter conditions min typ max units f rf(range) rf input frequency range (note 12) 30 to 1400 mhz f lo(range) lo input frequency range (note 12) 30 to 1400 mhz p lo(range) lo input power range (note 12) 0 to 10 dbm f rf1 = 140mhz, f rf2 = 141mhz, f lo = 130mhz, l6 = 68nh, c19 = 8.0pf, l5 = 82nh f rf(match) rf input frequency range return loss > 10db 95 to 190 mhz f lo(match) lo input frequency range return loss > 10db 105 to 180 mhz g v voltage conversion gain loaded with 100 pull-up (note 8) 5.7 db nf noise figure double-side band (note 4) 9.9 db nf blocking noise figure under blocking conditions double-side band, p rf = 0dbm (note 7) 15.5 db iip3 input 3rd order intercept 33 dbm iip2 input 2nd order intercept unadjusted, eip2 = 0v 70 dbm iip2 opt optimized input 2nd order intercept eip2 = 5v, ip2i, ip2q adjusted for minimum im2 80 dbm p1db input 1db compression 12 dbm dc offset dc offset at i/q outputs unadjusted, edc = 0v (note 13) 1.5 mv )g i/q gain mismatch 0.02 db )k i/q phase mismatch 0.2 deg
ltc5584 3 5584f e lec t rical c harac t eris t ics t c = 25c, v cc = 5v, en = 5v, edc = eip2 = 0v, ref = ip2i = ip2q = dcoi = dcoq = 0.5v, p rf = C5dbm (C5dbm/tone for 2-tone iip2 and iip3 tests), p lo = 6dbm, unless otherwise noted. (notes 2, 3, 5, 6, 9) symbol parameter conditions min typ max units irr image rejection ratio (note 10) 53 db lo-rf lo to rf leakage C85 dbm rf-lo rf to lo isolation 74 db f rf1 = 450mhz, f rf2 = 451mhz, f lo = 440mhz, l6 = 15nh, c19 = 1.0pf, l5 = 12nh, c14 = 4.0pf f rf(match) rf input frequency range return loss > 10db 300 to 600 mhz f lo(match) lo input frequency range return loss > 10db 310 to 590 mhz g v voltage conversion gain loaded with 100 pull-up (note 8) 5.4 db nf noise figure double-side band (note 4) 9.9 db nf blocking noise figure under blocking conditions double-side band, p rf = 0dbm (note 7) 13.6 db iip3 input 3rd order intercept 31 dbm iip2 input 2nd order intercept unadjusted, eip2 = 0v 70 dbm iip2 opt optimized input 2nd order intercept eip2 = 5v, ip2i, ip2q adjusted for minimum im2 80 dbm p1db input 1db compression 12.6 dbm dc offset dc offset at i/q outputs unadjusted, edc = 0v (note 13) 2 mv ?g i/q gain mismatch 0.02 db ? i/q phase mismatch 0.25 deg irr image rejection ratio (note 10) 52 db lo-rf lo to rf leakage C80 dbm rf-lo rf to lo isolation 70 db f rf1 = 900mhz, f rf2 = 901mhz, f lo = 940mhz, c17 = 1.5pf, l6 = 5.6nh, c13 = 2.2pf, l5 = 3.9nh f rf(match) rf input frequency range return loss > 10db 630 to 1200 mhz f lo(match) lo input frequency range return loss > 10db 470 to 1100 mhz g v voltage conversion gain loaded with 100 pull-up (note 8) 5.7 db nf noise figure double-side band (note 4) 10 db nf blocking noise figure under blocking conditions double-side band, p rf = 0dbm (note 7) 14.7 db iip3 input 3rd order intercept 28 dbm iip2 input 2nd order intercept unadjusted, eip2 = 0v 65 dbm iip2 opt optimized input 2nd order intercept eip2 = 5v, ip2i, ip2q adjusted for minimum im2 80 dbm p1db input 1db compression 13.1 dbm dc offset dc offset at i/q outputs unadjusted, edc = 0v (note 13) 2.5 mv ?g i/q gain mismatch 0.01 db ? i/q phase mismatch 0.7 deg irr image rejection ratio (note 10) 45 db lo-rf lo to rf leakage C75 dbm rf-lo rf to lo isolation 65 db power supply and other parameters v cc supply voltage 4.75 5.0 5.25 v i cc supply current edc = eip2 = v cc 180 200 220 ma i cc(low) supply current edc = eip2 = 0v 174 194 214 ma i cc(off) shutdown current en < 0.3v 11 900 a t on turn-on time en transition from logic low to high (note 14) 0.2 s t off turn-off time en transition from logic high to low (note 15) 0.8 s v eh en, edc, eip2 input high voltage (on) 2.0 v v el en, edc, eip2 input low voltage (off) 0.3 v
ltc5584 4 5584f e lec t rical c harac t eris t ics t c = 25c, v cc = 5v, en = 5v, edc = eip2 = 0v, ref = ip2i = ip2q = dcoi = dcoq = 0.5v, p rf = C5dbm (C5dbm/tone for 2-tone iip2 and iip3 tests), p lo = 6dbm, unless otherwise noted. (notes 2, 3, 5, 6, 9) symbol parameter conditions min typ max units i enh en pin input current en = 5.0v 52 a i edch edc pin input current edc = 5.0v 33 a i eip2h eip2 pin input current eip2 = 5.0v 50 a v ref ref pin voltage with ref pin unloaded 0.5 v v ref(range) ref pin voltage range when driven with external source 0.4 to 0.7 v z ref ref input impedance (note 11) 2||1 k||pf dcoi, dcoq, ip2i, ip2q pin voltage unloaded 0.5 v dcoi, dcoq, ip2i, ip2q voltage range when driven with external source 0 to 2v ref v dcoi, dcoq, ip2i, ip2q impedance (note 11) 8||1 k||pf dcoi, dcoq, ip2i, ip2q settling time for step input, output with 90% of final value 20 ns dc offset adjustment range dcoi, dcoq swept from 0v to 1v, edc = 5v 20 mv dc offset drift over temperature unadjusted, edc = 0v 20 v/c v cm i + , i C , q + , q C common mode voltage v cc C 1.5 v z out i + , i C , q + , q C output impedance single ended 100||6 ||pf bw bb i + , i C , q + , q C output bandwidth 100 external pull-up, C3db corner frequency 530 mhz note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: tests are performed with the test circuit of figure 1. note 3: the ltc5584 is guaranteed to be functional over the C40c to 105c case temperature operating range. note 4: dsb noise figure is measured at the baseband frequency of 15mhz with a small-signal noise source without any filtering on the rf input and no other rf signal applied. note 5: performance at the rf frequencies listed is measured with external rf and lo impedance matching, as shown in the table of figure 1. note 6: the complementary outputs (i + , i C and q + , q C ) are combined using a 180 phase-shift combiner. note 7: noise figure under blocking conditions (nf blocking ) is measured at an output noise frequency of 60mhz with an rf input blocking signal at f lo + 1mhz. both rf and lo input signals are appropriately filtered, as well as the baseband output. nf blocking measured at f lo of 160mhz, 460mhz and 885mhz. note 8: voltage conversion gain is calculated from the average measured power conversion gain of the i and q outputs using the test circuit shown in figure 1. power conversion gain is measured with a 100 differential load impedance on the i and q outputs. note 9: baseband outputs have a 100 external pull-up resistor to v cc as shown in the test circuit shown in figure 1. note 10: image rejection is calculated from the measured gain error and phase error using the method listed in the appendix. note 11: the dcoi, dcoq, ip2i, ip2q pins have an 8k internal resistor to ground. the ref pin has a 2k internal resistor to ground. if unconnected, these pins will float up to 500mv through internal current sources. a low output resistance voltage source is recommended for driving these pins. note 12: this is the recommended operating range, operation outside the listed range is possible with degraded performance to some parameters. note 13: dc offset measured differentially between i + and i C and between q + and q C . the reported value is the mean of the absolute values of the characterization data distribution. note 14: baseband amplitude is within 10% of final value. note 15: baseband amplitude is at least 30db down from its on state.
ltc5584 5 5584f d c p er f or m ance c harac t eris t ics typical p er f or m ance c harac t eris t ics iip3 and p1db vs temperature (t c ) iip3 and p1db vs supply voltage (v cc ) iip3 vs lo power supply current vs supply voltage ref voltage vs temperature en = 5v, edc = 0v and eip2 = 0v. test circuit shown in figure 1 140mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 130mhz, f rf1 = 140mhz, f rf2 = 141mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. lo frequency (mhz) 80 iip3, p1db (dbm) 30 5584 g03 20 10 120 160 100 140 180 40 50 iip3 p1db 25 15 35 45 200 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 80 iip3, p1db (dbm) 30 5584 g04 20 10 120 160 100 140 180 40 50 25 15 35 45 200 i, 4.75v i, 5.0v i, 5.25v q, 4.75v q, 5.0v q, 5.25v t c = 25c iip3 p1db lo frequency (mhz) 80 iip3 (dbm) 30 5584 g05 20 10 120 160 100 140 180 40 50 25 15 35 45 200 t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm supply voltage (v) 4.75 160 supply current (ma) 170 190 200 210 260 230 5 5585 g01 180 240 250 220 5.25 t c = ?40c t c = 25c t c = 85c t c = 105c temperature (c) ?40 500 ref voltage (mv) 505 515 520 525 550 535 0 40 60 80 5584 g02 510 540 545 530 ?20 20 100 v cc = 4.75v v cc = 5v v cc = 5.25v
ltc5584 6 5584f typical p er f or m ance c harac t eris t ics iip2 vs ip2i, ip2q trim voltage iip2 vs rf tone spacing 2x2 half-if iip2 vs rf to lo tone spacing noise figure and conversion gain vs lo power noise figure and conversion gain vs temperature (t c ) 2-tone iip3 vs rf power uncalibrated iip2 vs temperature (t c ) noise figure vs rf power and ip2i, ip2q trim voltage uncalibrated iip2 vs lo power 140mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 130mhz, f rf1 = 140mhz, f rf2 = 141mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. rf power (dbm) ?10 iip3 (dbm) 35 40 45 50 ?4 0 2 4 5584 g06 30 25 20 ?8 ?6 ?2 t c = 25c f rf1 = 140mhz f rf2 = 141mhz f lo = 130mhz q i lo frequency (mhz) 80 130 120 110 100 90 80 70 60 140 180 5584 g07 100 120 160 200 iip2 (dbm) i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 80 130 120 110 100 90 80 70 60 140 180 5584 g08 100 120 160 200 iip2 (dbm) t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm ip2i, ip2q (v) 0 iip2 (dbm) 90 100 110 0.8 0.9 5585 g09 80 70 50 0.2 0.4 0.6 0.1 1.0 0.3 0.5 0.7 60 130 f rf = 140mhz eip2 = 5v 120 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c rf tone spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g10 i (uncalibrated) i (nulled at 1mhz) q (uncalibrated) q (nulled at 1mhz) t c = 25c f rf1 = 140mhz f lo = 130mhz zfscj-2-1 bb combiner rf to lo spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g11 q i zfscj-2-1 bb combiner t c = 25c f lo = 140mhz lo frequency (mhz) 80 0 nf, gain (db) 4 8 12 100 120 140 160 5584 g12 180 16 20 2 6 10 14 18 200 nf gain i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 80 0 nf, gain (db) 4 8 12 100 120 140 160 5584 g13 180 16 20 2 6 10 14 18 200 nf gain t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm ip2i, ip2q trim voltage (v) 0 dsb noise figure (db) 16 18 20 0.8 5584 g14 14 12 15 17 19 13 11 10 0.20.1 0.40.3 0.6 0.7 0.9 0.5 1.0 i, ?20dbm i, 0dbm q, ?20dbm q, 0dbm t c = 25c f rf = 160mhz f lo = 159mhz f noise = 60mhz eip2 = 5v
ltc5584 7 5584f typical p er f or m ance c harac t eris t ics dc offset vs lo power noise figure vs rf input power dc offset vs temperature (t c ) dc offset vs dcoi, dcoq control voltage lo to rf leakage and rf to lo isolation image rejection vs temperature dc offset distribution, i-side dc offset distribution, q-side 140mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 130mhz, f rf1 = 140mhz, f rf2 = 141mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. rf input power (dbm) ?20 dsb noise figure (db) 19 22 24 23 20 21 17 18 14 15 11 12 ?5 5 10 5584 g15 16 13 10 9 ?15 ?10 0 plo = 0dbm plo = 6dbm plo = 10dbm t c = 25c f lo = 159mhz f rf = 160mhz f noise = 60mhz lo frequency (mhz) 80 dc offset (mv) 5 8 10 9 6 7 3 4 0 1 ?3 ?2 140 180 200 5584 g16 2 ?1 ?4 ?5 100 120 160 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 80 dc offset (mv) 5 8 10 9 6 7 3 4 0 1 ?3 ?2 140 180 200 5584 g17 2 ?1 ?4 ?5 100 120 160 t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm dcoi, dcoq (v) 0 ?25 dc offset (mv) ?20 ?10 ?5 0 25 30 35 40 10 0.2 0.4 5584 g18 ?15 15 20 5 0.6 1.0 0.8 0.1 0.3 0.5 0.7 0.9 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c f lo = 140mhz edc = 5v dc offset (mv) ?2.5 percentage distribution (%) 20 30 5584 g19 10 0 ?1.5 0.5 ?0.5 1.5 2.5 90 40 t c = ?40c t c = 25c t c = 85c t c = 105c f lo = 100mhz dc offset (mv) ?2.5 percentage distribution (%) 20 30 5584 g20 10 0 ?1.5 0.5 ?0.5 1.5 2.5 90 40 t c = ?40c t c = 25c t c = 85c t c = 105c f lo = 100mhz lo frequency (mhz) 80 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 140 180 5584 g21 100 120 160 200 leakage (dbm), ?isolation (db) l-r, ?40c l-r, 25c l-r, 85c l-r, 105c r-l, ?40c r-l, 25c r-l, 85c r-l, 105c lo frequency (mhz) 80 image rejection (db) 60 5584 g22 40 20 120 160 100 140 180 80 100 50 30 70 90 200 t c = ?40c t c = 25c t c = 85c t c = 105c
ltc5584 8 5584f typical p er f or m ance c harac t eris t ics 450mhz application. v cc = 5v, en = 5v, edc = 0v, ref = 0.5v, eip2 = 0v, t c = 25c, p lo = 6dbm, f lo = 440mhz, f rf1 = 450mhz, f rf2 = 451mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. 2-tone iip3 vs rf power 2x2 half-if iip2 vs rf to lo tone spacing uncalibrated iip2 vs temperature (t c ) uncalibrated iip2 vs lo power iip2 vs ip2i, ip2q trim voltage iip2 vs rf tone spacing iip3 and p1db vs temperature (t c ) iip3 and p1db vs supply voltage (v cc ) iip3 vs lo power lo frequency (mhz) 200 iip3, p1db (dbm) 25 30 35 500 700 iip3 5584 g23 20 15 10 300 400 600 40 45 50 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c p1db lo frequency (mhz) 200 iip3, p1db (dbm) 25 30 35 500 700 5584 g24 20 15 10 300 400 600 40 45 50 i, 4.75v i, 5.0v i, 5.25v q, 4.75v q, 5.0v q, 5.25v t c = 25c iip3 p1db lo frequency (mhz) 200 iip3 (dbm) 25 30 35 500 700 5584 g25 20 15 10 300 400 600 40 45 50 t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm rf power (dbm) ?10 iip3 (dbm) 35 40 45 50 ?4 0 2 4 5584 g26 30 25 20 ?8 ?6 ?2 t c = 25c f rf1 = 450mhz f rf2 = 451mhz f lo = 440mhz q i lo frequency (mhz) 200 130 120 110 100 90 80 70 60 500 5584 g27 300 400 600 700 iip2 (dbm) i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 200 130 120 110 100 90 80 70 60 500 5584 g28 300 400 600 700 iip2 (dbm) t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm ip2i, ip2q (v) 0 iip2 (dbm) 90 100 110 0.8 0.9 5584 g29 80 70 50 0.2 0.4 0.6 0.1 1.0 0.3 0.5 0.7 60 130 120 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c f rf = 450mhz eip2 = 5v rf tone spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g30 i (uncalibrated) i (nulled at 1mhz) q (uncalibrated) q (nulled at 1mhz) t c = 25c f rf1 = 450mhz f lo = 440mhz zfscj-2-1 bb combiner q i rf to lo spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g31 t c = 25c f lo = 450mhz zfscj-2-1 bb combiner
ltc5584 9 5584f typical p er f or m ance c harac t eris t ics 450mhz application. v cc = 5v, en = 5v, edc = 0v, ref = 0.5v, eip2 = 0v, t c = 25c, p lo = 6dbm, f lo = 440mhz, f rf1 = 450mhz, f rf2 = 451mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. noise figure vs rf input power noise figure and conversion gain vs temperature (t c ) noise figure and conversion gain vs lo power dc offset vs dcoi, dcoq control voltage dc offset vs temperature (t c ) dc offset vs lo power lo to rf leakage and rf to lo isolation image rejection vs temperature rf input power (dbm) ?20 9 dsb noise figure (db) 11 13 17 15 19 23 21 ?15 ?10 ?5 0 5584 g32 5 10 plo = 0dbm plo = 6dbm plo = 10dbm t c = 25c f lo = 460mhz f rf = 461mhz f noise = 60mhz lo frequency (mhz) 200 nf, gain (db) 12 16 20 600 5584 g33 8 4 10 14 18 6 2 0 300 400 500 700 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c nf gain lo frequency (mhz) 200 nf, gain (db) 12 16 20 600 5584 g34 8 4 10 14 18 6 2 0 300 400 500 700 nf gain t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm lo frequency (mhz) 200 10.0 7.5 5.0 2.5 0 ?2.5 ?5.0 500 5584 g35 300 400 600 700 dc offset (mv) i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c dcoi, dcoq (v) 0 ?25 dc offset (mv) ?20 ?10 ?5 0 25 30 35 40 10 0.2 0.4 5584 g36 ?15 15 20 5 0.6 1.0 0.8 0.1 0.3 0.5 0.7 0.9 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c f lo = 450mhz edc = 5v lo frequency (mhz) 200 10.0 7.5 5.0 2.5 0 ?2.5 ?5.0 500 5584 g37 300 400 600 700 dc offset (mv) t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm lo frequency (mhz) 200 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 500 5584 g38 300 400 600 700 leakage (dbm), ?isolation (db) l-r, ?40c l-r, 25c l-r, 85c l-r, 105c r-l, ?40c r-l, 25c r-l, 85c r-l, 105c lo frequency (mhz) 200 image rejection (db) 60 5584 g39 40 20 400 600 300 500 80 100 50 30 70 90 700 t c = ?40c t c = 25c t c = 85c t c = 105c
ltc5584 10 5584f typical p er f or m ance c harac t eris t ics 900mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 890mhz, f rf1 = 900mhz, f rf2 = 901mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. iip3 and p1db vs temperature (t c ) iip3 and p1db vs supply voltage (v cc ) iip3 vs lo power 2-tone iip3 vs rf power uncalibrated iip2 vs temperature (t c ) uncalibrated iip2 vs lo power iip2 vs ip2i, ip2q trim voltage iip2 vs rf tone spacing 2x2 half-if iip2 vs rf to lo tone spacing lo frequency (mhz) 400 iip3, p1db (dbm) 25 30 35 1000 1400 iip3 5584 g40 20 15 10 600 800 1200 40 45 50 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c p1db lo frequency (mhz) 400 iip3, p1db (dbm) 25 30 35 1000 1400 5584 g41 20 15 10 600 800 1200 40 45 50 i, 4.75v i, 5.0v i, 5.25v q, 4.75v q, 5.0v q, 5.25v t c = 25c iip3 p1db lo frequency (mhz) 400 iip3 (dbm) 25 30 35 1000 1400 5584 g42 20 15 10 600 800 1200 40 45 50 t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm rf power (dbm) ?10 iip3 (dbm) 35 40 45 50 ?4 0 2 4 5584 g43 30 25 20 ?8 ?6 ?2 t c = 25c f rf1 = 900mhz f rf2 = 901mhz f lo = 890mhz q i lo frequency (mhz) 400 120 110 100 90 80 70 60 50 1000 5584 g44 600 800 1200 1400 iip2 (dbm) i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 400 120 110 100 90 80 70 60 50 1000 5584 g45 600 800 1200 1400 iip2 (dbm) t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm ip2i, ip2q (v) 0 iip2 (dbm) 90 100 110 0.8 0.9 5585 g46 80 70 50 0.2 0.4 0.6 0.1 1.0 0.3 0.5 0.7 60 130 f rf = 900mhz eip2 = 5v 120 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c zfscj-2-1 bb combiner rf tone spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g47 i (uncalibrated) i (nulled at 1mhz) q (uncalibrated) q (nulled at 1mhz) t c = 25c f rf1 = 900mhz f lo = 890mhz q i rf to lo spacing (mhz) 1 50 iip2 (dbm) 60 70 80 90 100 110 10 100 1000 5584 g48 t c = 25c f lo = 900mhz zfscj-2-1 bb combiner
ltc5584 11 5584f typical p er f or m ance c harac t eris t ics 900mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 890mhz, f rf1 = 900mhz, f rf2 = 901mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. dc offset vs temperature (t c ) dc offset vs lo power dc offset vs dcoi, dcoq control voltage lo to rf leakage and rf to lo isolation image rejection vs temperature conversion gain distribution noise figure vs rf input power noise figure and conversion gain vs temperature (t c ) noise figure and conversion gain vs lo power rf input power (dbm) ?20 9 dsb noise figure (db) 11 13 17 15 19 23 21 ?15 ?10 ?5 0 5584 g49 5 10 plo = 0dbm plo = 6dbm plo = 10dbm t c = 25c f lo = 884mhz f rf = 885mhz f noise = 60mhz lo frequency (mhz) 400 nf, gain (db) 12 16 20 1200 5584 g50 8 4 10 14 18 6 2 0 600 800 1000 1400 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c nf gain lo frequency (mhz) 400 nf, gain (db) 12 16 20 1200 5584 g51 8 4 10 14 18 6 2 0 600 800 1000 1400 nf gain t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm lo frequency (mhz) 400 10.0 7.5 5.0 2.5 0 ?2.5 ?5.0 1000 5584 g52 600 800 1200 1400 dc offset (mv) i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (mhz) 400 10.0 7.5 5.0 2.5 0 ?2.5 ?5.0 1000 5584 g53 600 800 1200 1400 dc offset (mv) t c = 25c i, 0dbm i, 6dbm i, 10dbm q, 0dbm q, 6dbm q, 10dbm dcoi, dcoq (v) 0 ?25 dc offset (mv) ?20 ?10 ?5 0 25 30 35 40 10 0.2 0.4 5584 g54 ?15 15 20 5 0.6 1.0 0.8 0.1 0.3 0.5 0.7 0.9 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c f lo = 900mhz edc = 5v lo frequency (mhz) 400 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 1000 5584 g55 600 800 1200 1400 leakage (dbm), ?isolation (db) l-r, ?40c l-r, 25c l-r, 85c l-r, 105c r-l, ?40c r-l, 25c r-l, 85c r-l, 105c lo frequency (mhz) 400 image rejection (db) 60 5584 g56 40 20 800 1200 600 1000 80 100 50 30 70 90 1400 t c = ?40c t c = 25c t c = 85c t c = 105c conversion gain (db) 4.7 40 50 70 5.3 5.7 5584 g57 30 20 4.9 5.1 5.5 5.9 10 0 60 percentage distribution (%) t c = ?40c t c = 25c t c = 85c t c = 105c
ltc5584 12 5584f typical p er f or m ance c harac t eris t ics 900mhz application. v cc = 5v, en = 5v, edc = 0v, eip2 = 0v, ref = 0.5v, t c = 25c, p lo = 6dbm, f lo = 890mhz, f rf1 = 900mhz, f rf2 = 901mhz, f bb = 10mhz, p rf1 = p rf2 = C5dbm, dc blocks and mini-circuits pscj-2-1 180 combiner at baseband outputs de-embedded from measurement unless otherwise noted. test circuit with rf and lo ports impedance matched as in figure 1. dsb noise figure distribution, q-side iip2 distribution, i-side iip2 distribution, q-side gain error distribution phase error distribution image rejection distribution (note 10) iip3 distribution, i-side iip3 distribution, q-side dsb noise figure distribution, i-side iip3 (dbm) 26.5 percentage distribution (%) 40 60 5584 g58 20 0 27.5 28.5 29.5 27 28 29 30 80 30 50 10 70 t c = ?40c t c = 25c t c = 85c t c = 105c iip3 (dbm) 27 percentage distribution (%) 40 60 5584 g59 20 0 27.5 28.5 29.5 28 29 30 80 30 50 10 70 t c = ?40c t c = 25c t c = 85c t c = 105c dsb noise figure (db) 9 50 60 70 10.6 5584 g61 40 30 9.4 9.8 10.2 20 10 0 percentage distribution (%) t c = ?40c t c = 25c t c = 85c t c = 105c iip2 (dbm) 69 0 percentage distribution (%) 10 30 40 50 100 70 70 71 71.5 72 5584 g62 20 80 90 60 69.5 70.5 t c = ?40c t c = 25c t c = 85c t c = 105c iip2 (dbm) 64.5 0 percentage distribution (%) 10 30 40 50 100 70 66.5 68.5 69.5 5584 g63 20 80 90 60 65.5 67.5 t c = ?40c t c = 25c t c = 85c t c = 105c gain error (db) ?0.04 40 50 70 0 0.04 5584 g64 30 20 ?0.02 0.02 0.06 10 0 60 percentage distribution (%) t c = ?40c t c = 25c t c = 85c t c = 105c phase error (degrees) 0.4 percentage distribution (%) 40 60 5584 g65 20 0 0.5 0.7 0.9 0.6 0.8 1.0 70 30 50 10 t c = ?40c t c = 25c t c = 85c t c = 105c image rejection (db) 41 percentage distribution (%) 30 40 50 44 46 5584 g66 20 10 0 42 43 45 47 48 t c = ?40c t c = 25c t c = 85c t c = 105c dsb noise figure (db) 9 percentage distribution (%) 20 30 40 5584 g60 10 0 9.4 10.2 9.8 10.6 11 70 60 50 t c = ?40c t c = 25c t c = 85c t c = 105c
ltc5584 13 5584f p in func t ions ip2q, ip2i (pin 1, pin 4): iip2 adjustment analog control voltage input for q and i channel. a decoupling capacitor is recommended on this pin. a low output resistance volt- age source is recommended for driving these pins. these pins should be left floating if unused. dcoq, dcoi (pin 2, pin 3): dc offset analog control voltage input for q and i channel. a decoupling capaci - tor is recommended on this pin. a low output resistance voltage source is recommended for driving these pins. these pins should be left floating if unused. rf + , rf C (pin 5, pin 6): rf differential inputs. an external balun transformer with matching is used to obtain good return loss across the rf input frequency range. the rf pin should be dc-blocked with a 0.01f coupling capacitor. gnd (pins 8, 13, 14, exposed pad pin 25): ground. these pins must be soldered to the rf ground plane on the circuit board. the backside exposed pad ground connection should have a low inductance connection and good thermal contact to the printed circuit board ground plane using many through-hole vias. see figures 2 and 3. en (pin 7): enable pin. when the voltage on the en pin is a logic high, the chip is completely turned on; the chip is completely turned off for a logic low. an internal 200k pull-down resistor ensures the chip remains disabled if there is no connection to the pin (open-circuit condition). v bias (pin 9): this pin can be pulled to ground through a resistor to lower the current consumption of the chip. see applications information. v cc (pin 10): positive supply pin. this pin should be bypassed with shunt 0.01f and 1f capacitors. edc (pin 11): dc offset adjustment mode enable pin. when the voltage on the edc pin is a logic high, the dc offset control circuitry is enabled. the circuitry is disabled for a logic low. an internal 200k pull-down resistor ensures the circuitry remains disabled if there is no connection to the pin (open-circuit condition). eip2 (pin 12): ip2 offset adjustment mode enable pin. when the voltage on the eip2 pin is a logic high, the ip2 adjustment circuitry is enabled. the circuitry is disabled for a logic low. an internal 200k pull-down resistor ensures the circuitry remains disabled if there is no connection to the pin (open-circuit condition). lo + ,lo C (pin 15, pin 16): lo inputs. external matching is required to obtain good return loss across the lo input frequency range. can be driven single ended or differen- tially with an external transformer. the lo pins should be dc-blocked with 0.01f coupling capacitors. v cap , cmq, cmi (pin 17, pin 18, pin 19): common mode bypass capacitor pins. it is recommended that cmi and cmq be connected to v cap through 0.1f capacitors. nothing else should be connected to v cap since it is con- nected to v cc inside the chip. i + , i C , q + , q C (pin 23, pin 22, pin 21, pin 20): differential baseband output pins for the i channel and q channel. the dc bias point is v cc C 1.5v for each pin. these pins must have an external 100 or an inductor pull-up to v cc . ref (pin 24): voltage reference input for analog control voltage pins. a decoupling capacitor is recommended on this pin. a low output resistance voltage source is recommended for driving this pin. this pin should be left floating if unused.
ltc5584 14 5584f b lock diagra m rf + rf ? 0 90 bias ip2 and dc offset cal v cc v cap cmi i + i ? ip2 and dc offset cal 23 19 22 5 q + q ? cmq 20 21 18 edc eip2 ref 12 11 24 dcoi 3 ip2i 4 ip2q 1 dcoq 2 6 lo + 15 lo ? 16 en gnd 7 gnd gnd 5584 bd exposed pad v bias 9 25 8 13 14 10 17
ltc5584 15 5584f tes t c ircui t frequency range rf match lo match c17 l6 c19 c13 l5 c14 140mhz 68nh 8.0pf 82nh 450mhz 15nh 1.0pf 12nh 4.0pf 900mhz 1.5pf 5.6nh 2.2pf 3.9nh ref des value size vendor ref des value size vendor c10, c11, c31-c35 0.1f 0402 murata l5, l6 see table 0402 murata c15, c38-c41 0.01f 0402 murata r9, r11, r13, r14 100 0402 vishay c13, c14, c17, c19 see table 0402 murata t1, t2 1:1 at224-1 mini-circuits tc1-1-13m + c16, c21, c22, c29, c30 1f 0402 murata figure 1. test circuit schematic 24 23 22 21 20 19 7 c35 c40 c38 t1 l5 lo c39 c13 c14 c41 t2 1 6 4 2 3 3 4 6 2 1 8 9 10 11 12 6 5 4 3 2 1 13 25 14 15 16 17 18 c11 ip2q dcoq dcoi ip2i rf + rf ? ip2q dcoq dcoi ip2i cmq v cap lo ? lo + gnd gnd gnd ref i + i ? q + q ? cmi en gnd v bias v cc edc eip2 ltc5584iuf c10 c19c17 c31 c21 r11 c22 c30 eip2 edc c16 5584 f01 v cc 4.75v to 5.25v c15 c34 c33 c29 c32 rf i + out i ? out q ? out q + out en ref rf gnd 0.015" 0.015" 0.062" nelco n4000-13 dc gnd r13 r9 r14 l6 ?? ??
ltc5584 16 5584f tes t c ircui t figure 2. component side of evaluation board figure 3. bottom side of evaluation board a pplica t ions i n f or m a t ion the ltc5584 is an iq demodulator designed for high dynamic range receiver applications. it consists of rf transconductance amplifiers, i/q mixers, quadrature lo amplifiers, iip2 and dc offset correction circuitry, and bias circuitry. operation as shown in the block diagram for the ltc5584, the rf signal is applied to the inputs of the rf transconductor v-to-i converters and is then demodulated into i/q baseband signals using quadrature lo signals which are internally generated by a precision 90 phase shifter. the demodulated i/q signals are lowpass filtered on-chip with a C3db bandwidth of 530mhz. the differential outputs of the i-channel and q-channel are well matched in amplitude and their phases are 90 apart. rf input port figure 4 shows the demodulators differential rf input which consists of high linearity transconductance ampli- fiers (v-i converters). external dc voltage should not be applied to the rf input pins. dc current flowing into the pins may cause damage to the transconductance amplifiers. series dc blocking capacitors should be used to couple the rf input pins to the rf signal source. the rf input port can be externally matched over the operating frequency range with simple l-c matching. an input return loss greater than 10db can be obtained over a fractional bandwidth of greater than 66% with this method. figure?5 shows the rf input return loss for various matching component values. table 1 shows the differential and single-ended s parameters for the rf input without using any external matching components. the input transmission line length and balun are de-embedded from the measurement.
ltc5584 17 5584f rf + rf ? bias c40 0.01f c41 0.01f rf input (matched) gnd 5584 f04 ltc5584 c19 c17 l6 1 6 4 2 3 ?? t2 mini-circuits tc1-1-13m + figure 4: simplified schematic of the rf interface a pplica t ions i n f or m a t ion figure 5. rf input return loss larger bandwidths can be obtained by using more ele - ments. for example figure 6 shows an l-c match having a bandwidth of about 98% where return loss is >10db. figure 7 shows the rf input return loss for the wide bandwidth match. table 1. rf input s parameters frequency (mhz) s11 (differential) s11 (single ended) mag angle() mag angle() 10 0.5657 C2.416 0.3253 C5.287 20 0.55 C2.674 0.3055 C5.761 40 0.5391 C2.288 0.2938 C4.499 80 0.5349 C2.268 0.2984 C4.517 140 0.5336 C2.946 0.3097 C9.805 200 0.5329 C3.836 0.2989 C16.34 300 0.5317 C5.453 0.2732 C21.46 400 0.5301 C7.128 0.2614 C24.35 450 0.5292 C7.975 0.2583 C25.79 500 0.5282 C8.826 0.2562 C27.29 600 0.5258 C10.54 0.2536 C30.43 700 0.523 C12.25 0.2523 C33.66 800 0.5199 C13.97 0.2517 C36.88 900 0.5164 C15.7 0.2519 C39.97 1000 0.5124 C17.43 0.2529 C42.85 1100 0.5082 C19.17 0.2556 C45.49 1200 0.5035 C20.91 0.2609 C48.02 1300 0.4985 C22.66 0.2693 C50.73 1400 0.4931 C24.42 0.2804 C53.98 1500 0.4873 C26.19 0.2925 C57.96 1600 0.4812 C27.97 0.3035 C62.52 1700 0.4747 C29.77 0.3122 C67.36 1800 0.4678 C31.58 0.3187 C72.19 1900 0.4606 C33.41 0.3235 C76.87 2000 0.453 C35.26 0.3271 C81.36 note: differential s parameters measured with 1:1 balun and single- ended s parameters measured with 50 termination on unused port. frequency (ghz) ?30 return loss (db) ?20 ?10 0 ?25 ?15 ?5 0.4 0.8 1.2 1.6 5584 f05 2.0 0.20 0.6 1.0 1.4 1.8 l6 = 68nh, c19 = 8.0pf l6 = 15nh, c19 = 1.0pf c17 = 1.5pf, l6 = 5.6nh no matching t c = 25c rf + rf ? bias c40 0.01f t2 mini-circuits tc1-1-13m + c41 0.01f rf input 650mhz to 950mhz gnd 5584 f06 ltc5584 c17 2.7pf l6 7.5nh l7 5.6nh 1 ?? 6 4 2 3 figure 7. rf input return loss for wideband match figure 6. wide bandwidth rf input match frequency (ghz) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 return loss (db) ?10 ?5 5584 f07 ?15 ?20 2.0 t c = 25c c17 = 2.7pf l6 = 7.5nh l7 = 5.6nh 0
ltc5584 18 5584f a pplica t ions i n f or m a t ion broadband performance to get an idea of the broadband performance of the ltc5584, a 6db pad can be put on the rf and lo ports, and the ports can be left unmatched. the measured rf performance for this configuration is shown in figures?8, 9, 10 and 11 with the 6db pad de-embedded. the rf tone spacing is 1mhz, and f lo is 10mhz lower than f rf . the conversion gain is lower than under the impedance matched condition, and correspondingly the p1db, iip3, and nf are higher. as shown, the part can be used at frequencies outside its specified operating range with reduced conversion gain and higher nf. figure 8. broadband iip3 and ip1db figure 9. broadband iip2 figure 10. broadband nf and gain figure 11. broadband image rejection lo frequency (ghz) 0 iip3, p1db (dbm) 30 35 40 1.6 1.8 5584 f08 25 20 10 0.4 0.8 1.2 0.2 2.0 0.6 1.0 1.4 15 50 45 iip3 p1db i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (ghz) 0 iip2 (dbm) 100 120 140 1.6 5584 f09 80 60 90 110 130 70 50 40 0.40.2 0.80.6 1.2 1.4 1.8 1.0 2.0 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c lo frequency (ghz) 0 nf, gain (db) 12 16 20 1.6 5584 f10 8 4 10 14 18 6 2 0 0.40.2 0.80.6 1.2 1.4 1.8 1.0 2.0 i, ?40c i, 25c i, 85c i, 105c q, ?40c q, 25c q, 85c q, 105c gain nf lo frequency (ghz) 0 image rejection (db) 60 70 80 1.6 1.8 5584 f11 50 40 20 0.4 0.8 1.2 0.2 2.0 0.6 1.0 1.4 30 100 90 t c = ?40c t c = 25c t c = 85c t c = 105c lo input port the demodulators lo input interface is shown in fig - ure?12. the input consists of a high precision quadrature phase shifter which generates 0 and 90 phase shifted lo signals for the lo buffer amplifiers to drive the i/q mixers. dc blocking capacitors are required on the lo + and lo C inputs. the differential and single-ended lo input s parameters with the input transmission lines and balun de-embedded are listed in table 2.
ltc5584 19 5584f a pplica t ions i n f or m a t ion figure 12. simplified schematic of lo input interface with external matching components to identical q-channel phase shifter ltc5584 v cc lo + c39 0.01f lo input (matched) c13 c38 0.01f lo ? gnd 5584 f12 c14 l5 mini-circuits tc1-1-13m + 1 ?? 6 4 2 3 table 2. lo input s-parameters frequency (mhz) s11 (differential) s11 (single ended) mag angle() mag angle() 10 0.8138 C1.736 0.7869 C1.896 20 0.8485 C6.615 0.8127 C6.425 40 0.7857 C18.67 0.7382 C16.33 80 0.6608 C25.61 0.6356 C20.1 140 0.5968 C33.93 0.5801 C25.43 200 0.5515 C42.29 0.5395 C30.5 300 0.4932 C54.56 0.4911 C37.49 400 0.4538 C65.21 0.4606 C43.5 450 0.4396 C70.18 0.4498 C46.36 500 0.4283 C75.01 0.441 C49.17 600 0.412 C84.37 0.4278 C54.67 700 0.4018 C93.45 0.4187 C60.04 800 0.3958 C102.3 0.4124 C65.26 900 0.3928 C110.9 0.4083 C70.32 1000 0.3921 C119.2 0.4059 C75.21 1100 0.3931 C127.2 0.405 C79.94 1200 0.3955 C135 0.4052 C84.52 1300 0.399 C142.4 0.4064 C88.94 1400 0.4035 C149.5 0.4084 C93.23 1500 0.4088 C156.3 0.411 C97.37 1600 0.4148 C162.9 0.4143 C101.4 1700 0.4213 C169.1 0.4181 C105.3 1800 0.4283 C175.1 0.4224 C109.1 1900 0.4357 C180.8 0.4271 C112.8 2000 0.4435 C186.2 0.4322 C116.4 note: differential s parameters measured with 1:1 balun and single- ended s parameters measured with 50 termination on unused port. figure 13 shows lo input return loss using the mini- circuits tc1-1-13m + 1:1 balun with various matching component values. for optimum iip2 and large-signal nf performance the lo inputs should be driven differentially with a 1:1 balun such as the mini-circuits tc1-1-13m + or m/a com etc1-1-13. as shown in figure 14, the lo input can also be driven single-ended from either the lo + or lo C input. the unused port should be dc-blocked and terminated with a 50 load. figure 15 compares the uncalibrated iip2 performance of single ended versus differential lo drive. figure 13. lo input return loss frequency (ghz) ?30 return loss (db) ?20 ?10 0 ?25 ?15 ?5 0.4 0.8 1.2 1.6 5584 f13 2.0 0.20 0.6 1.0 1.4 1.8 l5 = 82nh l5 = 12nh, c14 = 4.0pf c13 = 2.2pf, l5 = 3.9nh no matching t c = 25c
ltc5584 20 5584f a pplica t ions i n f or m a t ion figure 14. recommended single-ended lo input configuration figure 15. broadband iip2 with differential and single-ended lo drive figure 16. conversion gain baseband output response with r load(diff) = 100, 200, 400 and 1k and r pull-up = 100 i-channel and q-channel outputs the phase relationship between the i-channel output signal and the q-channel output signal is fixed. when the lo input frequency is higher (or lower) than the rf input frequency, the q-channel outputs (q + , q C ) lead (or lag) the i-channel outputs (i + , i C ) by 90. each of the i-channel and q-channel outputs is internally connected to v cc through a 100 resistor. in order to maintain an output dc bias voltage of v cc C 1.5v, external 100 pull-up resistors or equivalent 15ma dc current sources are required. each single-ended output has an impedance of 100 in parallel with a 6pf internal capaci- tor. with an external 100 pull-up resistor this forms a lowpass filter with a C3db corner frequency at 530mhz. lo frequency (ghz) 30 iip2 (dbm) 50 70 100 40 60 80 90 0.4 0.8 1.2 1.6 5584 f15 2.0 0.20 0.6 1.0 1.4 1.8 single-ended lo, i-side differential lo, i-side single-ended lo, q-side differential lo, q-side t c = 25c to identical q-channel phase shifter ltc5584 v cc lo + c39 0.01f 50 l5 lo input (matched) c13 c38 0.01f lo ? gnd 5584 f14 c14 baseband frequency (ghz) 0 conversion gain (db) 2 1 0 4 6 7 5 3 ?1 0.4 0.5 0.7 1.0 ?4 ?2 ?8 ?6 ?5 ?3 ?7 0.1 0.2 0.3 0.6 0.8 0.9 r load(diff) = 100, bw = 850mhz r load(diff) = 200, bw = 630mhz r load(diff) = 400, bw = 530mhz r load(diff) = 1k, bw = 460mhz t c = 25c the outputs can be dc coupled or ac coupled to exter - nal loads. the voltage conversion gain is reduced by the external load by: 20log 10 1 2 + 50 r pull-up ||r load(se) ? ? ? ? ? ? db when the output port is terminated by r load(se) . for in- stance, the gain is reduced by 6db when each output pin is connected to a 50 load (or 100 differentially). the output should be taken differentially (or by using differential-to- single-ended conversion) for best rf performance, includ - ing nf and iip2. when no external filtering or matching components are used, the output response is determined by the loading capacitance and the total resistance loading the outputs. the C3db corner frequency, f c , is given by the following equation: f c = [2(r load(se) ||100||r pull-up ) (6pf)] C1 figure 16 shows the actual measured output response with various load resistances. figure 17 shows a simplified model of the i, q outputs with a 100 differential load and 100 pull-ups. the C1db bandwidth in this configuration is about 520mhz, or about twice the C1db bandwidth with no load. figure 18 shows a simplified model of the i, q outputs with a l-c matching network for bandwidth extension. capacitor c s serves to filter common mode lo switching noise immediately at the demodulator outputs. capacitor c c in combination with inductor l s is used to peak the
ltc5584 21 5584f a pplica t ions i n f or m a t ion figure 17. simplified model of the baseband output 100 ltc5584 100 6pf 6pf 0.2pf i + i ? 0.2pf 5584 f17 r load(diff) 100 ?1db bw = 520mhz 1.5nh v cc v cc gnd 1k ac current source 1.5nh 30ma 30ma r pull-up 100 r pull-up 100 package parasitics figure 19. alternate layout of pcb with baseband outputs on the backside figure 18. simplified model of the baseband output showing bandwidth extension with external l, c matching 100 ltc5584 100 6pf 6pf 0.2pf i + i ? 0.2pf c s 2pf c s 2pf c c 4pf c c 4pf l s 10nh l s 10nh 5584 f18 r load(diff) 100 lowpass ?1db bw = 650mhz 6ma max dc 1.5nf v cc v cc gnd 1k ac current source 1.5nf 30ma dc 30ma dc r pull-up 100 r pull-up 100 package parasitics output response to give greater bandwidth of 650mhz. in this case, capacitor c c was chosen as a common mode capacitor instead of a differential mode capacitor to increase rejection of common mode lo switching noise. when ac output coupling is used, the resulting highpass filters C3db roll-off frequency, f c , is defined by the r-c constant of the external ac coupling capacitance, c ac , and the differential load resistance, r load(diff) : f c = [2 ? r load(diff) ? c ac ] C1 care should be taken when the demodulators outputs are dc coupled to the external load to make sure that the i/q mixers are biased properly. if the current drain from the outputs exceeds about 6ma, there can be significant degradation of the linearity performance. keeping the com - mon mode output voltage of the demodulator above 3.15v, with a 5v supply, will ensure optimum performance. each output can sink no more than 30ma when the outputs are connected to an external load with a dc voltage higher than v cc C 1.5v. in order to achieve the best iip2 performance, it is im - portant to minimize high frequency coupling among the baseband outputs, rf port, and lo port. although it may increase layout complexity, routing the baseband output traces on the backside of the pcb can improve uncalibrated iip2 performance. figure 19 shows the alternate layout having the baseband outputs on the backside of the pcb.
ltc5584 22 5584f a pplica t ions i n f or m a t ion analog control voltage pins figure 20 shows the equivalent circuit for the dcoi, dcoq, ip2i, and ip2q pins. internal temperature compensated 62.5a current sources keep these pins biased at a nominal 500mv through 8k resistors. a low impedance voltage source with a source resistance of less than 200 is recommended to drive these pins. as shown in figure 21, the ref pin is similar to the dcoi pin, but the bias current source is 250a, and the inter - nal resistance is 2k. if this pin is left disconnected, it will self-bias to 500mv. a low impedance voltage source with a source resistance of less than 200 is recommended to drive this pin. the control voltage range of the dcoi, dcoq, ip2i and ip2q pins is set by the ref pin. this range is equal to 0v to twice the voltage on the ref pin, whether internally or externally applied. it is recommended to decouple any ac noise present on the signal lines that connect to the analog control-voltage inputs. a shunt capacitor to ground placed close to these pins can provide adequate filtering. for instance, a value of 1000pf on the dcoi, dcoq, ip2i and ip2q pins will provide a corner frequency of around 6 to 7mhz. a similar corner frequency can be obtained on the ref pin with a value of 3900pf. using larger capacitance values such as 0.1f is recommended on these pins unless a faster control response is needed. figure 22 shows the input response C3db bandwidth for the pins versus shunt capacitance when driven from a 50 source. dc offset adjustment circuitry any sources of lo leakage to the rf input of a direct conversion receiver will contribute to the dc offsets of its baseband outputs. the ltc5584 features dc offset adjustment circuitry to reduce such effects. when the edc pin is a logic high the circuitry is enabled and the resulting dc offset adjustment range is typically 20mv. in a typical direct conversion receiver application, dc offset calibration will be done periodically at a time when no receive data is present and when the receiver dc levels have sufficiently settled. figure 20. simplified schematic of the interface for the dcoi, dcoq, ip2i and ip2q pins figure 21. simplified schematic of the ref pin interface gnd 5584 f20 v cc 8k dcoi, dcoq, ip2i, ip2q 62.5a ltc5584 gnd 5584 f21 v cc 2k ref 250a ltc5584 figure 22. input response bandwidth for the dcoi, dcoq, ip2i and ip2q pins frequency (mhz) 0 response (db) ?4 ?2 0 16 5584 f22 ?6 ?8 ?5 ?3 ?1 ?7 ?9 ?10 42 86 12 14 18 10 20 dcoi, dcoq; c = 470pf dcoi, dcoq; c = 1000pf ip2i, ip2q; c = 100pf t c = 25c
ltc5584 23 5584f a pplica t ions i n f or m a t ion dc offset adjustment example figure 23 shows a typical direct conversion receive path having a dsp feedback path for dc offset adjustment. any sources of lo leakage to the rf input of the ltc5584 demodulator will contribute to the dc offset of the receiver. this includes both static and dynamic dc offsets. if the coupling is static in nature due to fixed board-level leakage paths, the resulting dc offset does not typically need to be adjusted at a high repetition rate. dynamic dc offsets due to transmitter transient leakage or antenna reflection can be much harder to correct for and will require a faster update rate from the dsp. lo leakage into the rf port of the demodulator causes a dc offset at the baseband outputs which is then multiplied by the gain in the baseband path. the usable adc voltage window will be reduced by the amplified dc offset, resulting in lower dynamic range. using dsp, this dc offset value can be averaged and sampled at a given update rate and then a 1d minimization algorithm can be applied before a new dcoi or dcoq control signal is generated to mini- mize the offset. the 1-d minimization algorithm can be implemented in many ways such as golden-section search, backtracking, or newtons method. im2 adjustment circuitry the ltc5584 also contains circuitry for the independent adjustment of im2 levels on the i and q channels. when the eip2 pin is a logic high, this circuitry is enabled and the ip2i and ip2q analog control voltage inputs are able to adjust the im2 level. the im2 level can be effectively minimized over a large range of the baseband bandwidth. the circuitry has an effective baseband frequency upper figure 24. equivalent circuit of the cmi and cmq pin interfaces gnd 5584 f24 v cc v cap cmi or cmq 40pf ltc5584 sample and hold dc averaging lowpass filter dsp dac adc dcoi f lo = 900mhz 5585 f23 lna bpf ltc5584 1-d minimization algorithm figure 23. block diagram of a receiver with a dsp feedback loop for dc offset adjustment limit of about 200mhz. any im2 component that falls in this frequency range can be minimized. beyond this frequency, the gain of the im2 correction amplifier falls off appreciably and the circuit no longer improves ip2 performance. the lower baseband frequency limit of the im2 adjustment circuitry is set by the common mode reference decoupling capacitor at the cmi and cmq pins. below this frequency the circuit can not minimize the im2 component. figure 24 shows the cmi (and identical cmq) pin interface. these pins have an internal 40pf decoupling capacitance to v cc , to provide a reference for the ip2 adjustment cir - cuitry. the lower 3db frequency limit, f c , of the circuitry is set by the following equation: f c = [2 ? 500(40pf + c cm(ext) )] C1 without any external capacitor on the cmi or cmq pin the lower limit is 8mhz. by adding a 0.1f capacitor, c cm(ext) , between the cmi and cmq pins to v cap , the lower C3db frequency corner can be reduced to 3khz. figure 25 shows iip2 as a function of rf frequency spacing versus common mode decoupling capacitance values of 0.1f and 1500pf. there is effectively no limit on the size of this capacitor,
ltc5584 24 5584f a pplica t ions i n f or m a t ion other than the impact it has on enable time for the im2 circuitry to be operational. when the chip is disabled, there is no current in the i or q mixers, so the common mode output voltage will be equal to v cc (if no dc common mode current is being drawn by external baseband circuitry such as a baseband amplifier). when the chip is enabled, the off-chip common mode decouping capacitor must charge up through a 500 resistor. the time constant for this is essentially 500 times the common mode decoupling capacitance value. for example, with a 0.01f capacitor this wait time is approximately 30s. figure 26 shows the pulsed enable response of the common-mode output voltage with 0.01f on the cmi and cmq pins. im2 suppression example im2 adjustment circuitry can be used in a typical transceiver loop-back application as shown in figure 27. in this example a 2-tone ssb training source of f1 = 20mhz and f2 = 21mhz is generated in dsp and upconverted by the ltc5588-1 quadrature modulator to rf tones at 870mhz and 871mhz using an lo source at 850mhz. a narrowband rf filter is required to remove the im2 component generated by the ltc5588-1. during the loopback test these rf tones are routed through high isolation switches and an attenuation pad to the ltc5584 demodulator input. the tones are then downconverted by the same lo source at 850mhz to produce two tones at the baseband outputs of 20mhz and 21mhz plus an im2 impairment signal at 1mhz. after base- band channel filtering and amplification the output of the adc is filtered by a 1mhz bandpass filter in dsp to isolate the im2 tone. the power in this tone is calculated in dsp and then a 1-d minimization algorithm is applied to calculate the correction signal for the ip2i control voltage pin. the 1-d minimization algorithm can be implemented in many ways such as golden-section search, backtracking or newtons method. enable interface a simplified schematic of the en pin is shown in figure?28. the enable voltage necessary to turn on the ltc5584 is 2v. to disable or turn off the chip, this voltage should be below 0.3v. if the en pin is not connected, the chip is disabled. figures 29 and 30 show the simplified schematics for the edc and eip2 pins. it is important that the voltage applied to the en, edc and eip2 pins should never exceed v cc by more than 0.3v. otherwise, the supply current may be sourced through the upper esd protection diode connected at the pin. under no circumstances should voltage be applied directly to the enable pins before the supply voltage is applied to the v cc pin. if this occurs, damage to the ic may result. a 1k resistor in series with the enable pin can be used to limit current. reducing power consumption figure 31 shows the simplified schematic of the v bias interface. the v bias pin can be used to lower the mixer figure 26. common mode output voltage with a pulsed enable figure 25. iip2 vs common mode decoupling capacitance time (s) 0 v cm (v) enable voltage (v) 6 7 8 80 5584 f26 5 4 3 0 5 10 ?5 ?10 ?15 10 20 30 40 50 60 70 90 100 t c = 25c c cmi,q = 0.01f en pulse off en pulse on cmi, cmq baseband outputs rf frequency spacing (mhz) 0.01 iip2 (dbm) 90 5584 f25 70 50 0.1 1 110 130 80 60 100 120 10 0.1f (uncalibrated) 0.1f (nulled ip2i = 0.6v) 1500pf (uncalibrated) 1500pf (nulled ip2i = 0.6v) t c = 25c f rf1 = 1000mhz f lo = 960mhz
ltc5584 25 5584f a pplica t ions i n f or m a t ion figure 27. block diagram for a direct conversion transceiver with im2 adjustment. only the i-channel is shown rms detection 1mhz bpf dsp dac adc ip2i f lo = 850mhz f1 = 20mhz f2 = 21mhz 5584 f27 lna ltc5584 loopback ltc5588-1 1-d minimization algorithm dac pa + figure 28. simplified schematic of the en pin interface figure 29. simplified schematic of the edc pin interface 100k en ltc5584 gnd 5584 f28 v cc 100k en 100k 100k edc ltc5584 5584 f29 v cc gnd 100k eip2 ltc5584 gnd 5584 f30 v cc 100k 10k figure 30. simplified schematic of the eip2 pin interface core bias current and total power consumption for the chip. for example, adding 487 from the v bias pin to gnd will lower the dc current to 169ma, at the expense of reduced iip3 performance. figure 32 shows iip3 and en v cc gnd 5584 f31 100 v bias c opt optional r to reduce current ltc5584 figure 31. simplified schematic of the v bias pin interface p1db performance versus dc current and resistor value. an optional capacitor, c opt in figure 31, has minimal effect on improving psrr and iip2.
ltc5584 26 5584f figure 32. iip3 and p1db vs dc current and v bias resistor value a pplica t ions i n f or m a t ion 900mhz receiver application figure 33 shows a typical receiver application consisting of the chain of lna, demodulator, lowpass filter, adc driver, and adc. total dc power consumption is about 2.1w. full- scale power at the rf input is C8.4dbm. the chebychev lowpass filter with unequal terminations is designed us- ing the method shown in the appendix. filter component values are then adjusted for the best overall response and available component values. a positive voltage gain slope with frequency is necessary to compensate for the roll-off contributed by the adc driver and anti-alias filter. from the chain analysis shown in figure 34, the iip3-nf dynamic range figure of merit (fom) is 5.3db at the lna input, 11.3db at the demodulator input, and 16.8db at the adc driver amp input. the measured 6th order lowpass baseband response is shown in figure 35. the receiver spurious free dynamic range (sfdr) in terms of fom can be calculated using the following equations: fom = iip3 C nf sfdr = 2/3(fom C p 0 ) p 0 = C174dbm + 10log 10 (bw| hz ) rf frequency (mhz) 400 0 5 p1db, iip3 (dbm) 15 20 25 50 35 800 1200 5584 f32 10 40 45 30 600 1000 1400 i, 194ma i, 169ma, 487 i, 145ma, 294 q, 194ma q, 169ma, 487 q, 145ma, 294 t c = 25c f rf = 900mhz p1db iip3 where p 0 is the input noise power and C174dbm is the input thermal noise power in a 1hz bandwidth. a measured 2-tone output spectrum at 890mhz is shown in figure?36. iip3 is calculated from the 2-tone im3 levels: iip3 = (C6.929 C (C88.33))/2 C 15.4 iip3 = 25.3dbm for this example, receiver noise floor is approximated by a measurement from 28mhz to 36mhz offset frequency, where adequate filtering for rf and lo signals was pos - sible. using the test data from figure 36, the receiver noise figure for the i-channel (ch?1) is calculated using the C8.4dbm input power, 15khz bin width, 40mhz bandwidth, and C108dbfs measured in-band noise floor: snr in = p in C p 0 snr in = C8.4 C (C174 + 76) = 89.6db snr out = C10 log 10 (binw/bw) C floor snr out = C43.3 + 108 = 73.7db nf = snr in C snr out nf = 89.6 C 73.7 = 15.9db finally, the receiver spurious free dynamic range can be calculated using the measured data at 890mhz: sfdr = 2(iip3 C nf C p 0 )/3 sfdr = 2(25.3 C 15.9 C (C174 + 76))/3 sfdr = 73db
ltc5584 27 5584f a pplica t ions i n f or m a t ion d13 d0 control v cm v dd ltc2185 adc 1.8v 206ma 5v 200ma 5v 48ma a in + a in ? r20 150 c22 39pf c21 39pf r19 150 r16 27.4 r15 27.4 r5 110 r4 110 c23 1f 5585 f33 r18 86.6 r17 86.6 r10 100 r12 36.5 r8 402 r9 402 r7 20 r2 5.6k r6 20 r11 36.5 r13 243 r14 243 5v 52ma c19 0.5pf c20 0.5pf c18 0.1f l12 180nh l11 180nh l8 180nh l7 180nh 40mhz lowpass filter 40mhz anti-alias filter l6 470nh l3 5.6nh avago mga-633p8 l2 33nh l4 3.9nh l5 470nh l10 270nh l9 270nh ? ? ? c15 150pf c16 150pf c17 1f r3 10 r1 0 ? ? + + v ocn ltc6409 c13 150pf c14 150pf c12 47pf c10 0.01f c11 0.01f lo input 881mhz 6dbm c9 47pf l2 33nh c7 1.5pf c2 0.01f c24 0.01f c25 0.01f c1 0.01f rf input 800mhz to 1000mhz c4 33pf c5 100pf c3 4.7f c6 4.7f c8 2.2pf i + v cc i ? rf + rf ? lo ? lo + ltc5584 lna bias ? ? t2 mini-circuits tc1-1-13m + 1 6 4 2 3 ?? t1 mini-circuits tc1-1-13m + 1 2 3 46 figure 33. simplified schematic of 900mhz receiver, (only i-channel is shown)
ltc5584 28 5584f a pplica t ions i n f or m a t ion figure 34. 900mhz receiver chain analysis ltc2185 5584 f34 40mhz aaf ltc6409 g = 0db nf = 23.1db ip3 = 47.5dbm g = ?1.2db nf = 1.2db g = 0db nf = 23.1db iip3 = 47.5dbm fom = 24.4db g = ?1.2db nf = 24.3db iip3 = 48.7dbm fom = 24.4db 40mhz lpf 900mhz receiver chain analysis ltc5584 g = ?0.3db nf = 0.3db g = ?0.3db nf = 10.4db iip3 = 27.9dbm g = 16.5db nf = 11.8db iip3 = 28.6dbm fom = 16.8db g = 16.2db nf = 14.2db iip3 = 25.5dbm fom = 11.3db g = 16.8db nf = 11.5db iip3 = 28.3dbm fom = 16.8db g = 18db nf = 10db oip3 = 50dbm mga-633p8 g = 34.2db nf = 1.7db iip3 = 7dbm fom = 5.3db g = 18db nf = 0.37db oip3 = 37dbm figure 35. baseband gain response without lna frequency (mhz) 0 ?80 gain (db) ?70 ?50 ?40 ?30 20 ?10 40 80 100 5584 f35 ?60 0 10 ?20 20 60 120 140 160 t c = 25c figure 36. f rf = 889mhz and 890mhz 2-tone receiver test, f lo = 881mhz. ch.1 is the i channel and ch.2 is the q channel. tested without lna
ltc5584 29 5584f a ppen d ix chebychev filter synthesis with unequal terminations to synthesize chebychev filters with unequal terminations, two equally terminated filters are synthesized at the two different impedance levels and the resulting networks are joined using the impedance bisection theorem[1]. this method only works with symmetrical odd-order filters. the general lowpass prototype element values are generated by the method shown [2]: = in coth l ar | db 17.37 ? ? ? ? ? ? = sinh 2n ? ? ? ? ? ? a k = sin 2k ? 1 ( ) 2n , k = 1,2,...,n b k = 2 + sin 2 k n , k = 1,2,...,n where l ar | db is the passband ripple in db, and n is the filter order. the prototype element values will be: g 1 = 2a 1 g k = 4a k a k?1 b k ? 1 g k ? 1 , k = 1,2,...,n g n + 1 = 1 for n odd g n + 1 = coth 2 4 ? ? ? ? ? ? for n even assuming the first element is a capacitor, we can scale the filter capacitor prototype values up to our desired cutoff frequency f c : c k = g k 2 ? f c ? r in , k = 1,3,...,n the filter inductor values can be scaled with: l k = g k ? r in 2 ? f c , k = 2,4,...,n figure 37. final design schematic + ? r in 100 l1 531.98nh c1 53.3pf c2 258.56pf l2 106.4nh c3 266.48pf r out 20 5585 f37 where r in is the input impedance and the terminating impedance r out is equal to r in for the n odd case but is scaled by the g n+1 prototype value for the n even case. the impedance bisection theorem can be applied to sym- metrical networks by dividing the element values along the networks plane of symmetry, and then adding the two networks together. the filter response is preserved. for example, if l ar | db = 0.2db, f c = 40mhz, r in = 100, r out = 20 and n = 5, the prototype element values and resulting scaled filter values are listed: filter 1: r in = r out = 100 g 1 = 1.339 c1 = 53.3pf g 2 = 1.337 l1 = 531.98nh g 3 = 2.166 c2 = 86.19pf g 4 = 1.337 l2 = 531.98nh g 5 = 1.339 c3 = 53.3pf filter 2: r in = r out = 20 g 1 = 1.339 c1 = 266.48pf g 2 = 1.337 l1 = 106.4nh g 3 = 2.166 c2 = 430.93pf g 4 = 1.337 l2 = 106.4nh g 5 = 1.339 c3 = 266.48pf the impedance bisection theorem can be applied at the plane of symmetry about c2 such that a new value of c2 can be computed with half the values of the two filters. c2 86.19pf 2 + 430.93pf 2 = 258.56pf the final unequally-terminated filter design values are shown in figure 37. [1] a.c. bartlett, an extension of a property of artificial lines, phil. mag., vol.4, p.902, november 1927. [2] g. matthaei, l. young, and e.m.t. jones, microwave filters, impedance-matching networks, and coupling structures, p.99, 1964.
ltc5584 30 5584f a ppen d ix image rejection calculation image rejection can be calculated from the measured gain and phase error responses of the demodulator. consider the signal diagram of figure 38: where: rf(t) = sin( lo + bb )t + sin( lo C im )t lo i (t) = cos( lo t + err ) lo q (t) = sin( lo t) lo + bb is the desired sideband frequency and lo C im is the image frequency. the total phase error of the i and q channels is lumped into the i-channel lo source as err . the total gain error is represented by a err , and is lumped into a gain multiplier in the i-channel. after lowpass filtering the i and q signals can be written as: i(t) = a err 2 sin bb t ? err ( ) ? sin im t + err ( ) ? ? ? ? q(t) = 1 2 cos bb t ( ) + cos im t ( ) ? ? ? ? shifting the q channel by C90 can be accomplished by replacing sine with cosine such that the shifted q-channel signal is: q ?90 (t) = 1 2 sin bb t ( ) + sin im t ( ) ? ? ? ? we combine i(t) + q C90 (t) and choose terms containing bb as the desired signal: desired = 1 2 sin bb t ( ) + a err 2 sin bb t ? err ( ) similarly, we choose terms containing im as the image signal: image = 1 2 sin im t ( ) ? a err 2 sin im t + err ( ) the image rejection ratio (irr) can then be written as: irr| db = 10log |desired| 2 |image| 2 written in terms of a err and err as: irr| db = 10log |1 + a err 2 + 2a err cos err ( ) | |1 + a err 2 ? 2a err cos err ( ) | figure 39 shows image rejection as a function of amplitude and phase errors for a demodulator. a err lo i (t) lo q (t) rf(t) i(t) q(t) 5585 f38 figure 38. signal diagram for a demodulator figure 39. image rejection as a function of gain and phase errors phase error (deg) 10 image rejection (db) 30 50 70 20 40 60 2 4 6 8 5585 f39 10 10 3 5 7 9 a err = 0db a err = 0.05db a err = 0.1db a err = 0.2db a err = 0.3db a err = 0.5db a err = 1db
ltc5584 31 5584f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 2423 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 rev b recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697 rev b)
ltc5584 32 5584f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0412 ? printed in usa r ela t e d p ar t s typical a pplica t ion simplified schematic of 900mhz receiver, (only i-channel is shown) d13 d0 control v cm v dd ltc2185 adc 1.8v 206ma 5v 200ma a in + a in ? r20 150 c22 39pf c21 39pf r19 150 r16 27.4 r15 27.4 r5 110 r4 110 c23 1f 5584 ta02 r18 86.6 r17 86.6 r10 100 r12 36.5 r8 402 r9 402 r7 20 r6 20 r11 36.5 r13 243 r14 243 5v 52ma c19 0.5pf c20 0.5pf c18 0.1f l12 180nh l11 180nh l8 180nh l7 180nh 40mhz lowpass filter l6 470nh l3 5.6nh l5 470nh l10 270nh l9 270nh ? ? ? c15 150pf c16 150pf c17 1f ? ? + + v ocm ltc6409 c13 150pf c14 150pf c12 47pf c9 47pf c7 1.5pf c2 0.01f c24 0.01f c25 0.01f i + v cc i ? rf + rf ? lo ? lo + ltc5584 rf input 800mhz to 1000mhz 40mhz anti-alias filter (aaf) ? ? t2 mini-circuits tc1-1-13m + 1 6 4 2 3 l4 3.9nh lo input 900mhz 6dbm c8 2.2pf ? ? t1 mini-circuits tc1-1-13m + 1 2 3 46 c10 0.01f c11 0.01f part number description comments infrastructure ltc5569 300mhz to 4ghz dual active downconverting mixer 2db gain, 26.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/180ma supply lt5527 400mhz to 3.7ghz, 5v downconverting mixer 2.3db gain, 23.5dbm iip3 and 12.5db nf at 1900mhz, 5v/78ma supply lt5557 400mhz to 3.8ghz, 3.3v downconverting mixer 2.9db gain, 24.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/82ma supply ltc6409 10ghz gbw differential amplifier dc-coupled, 48dbm oip3 at 140mhz, 1.1nv/ hz input noise density ltc6412 31db linear analog vga 35dbm oip3 at 240mhz, continuous gain range C14db to 17db ltc554x 600mhz to 4ghz downconverting mixer family 8db gain, >25dbm iip3, 10db nf, 3.3v/200ma supply lt5554 ultralow distortion if digital vga 48dbm oip3 at 200mhz, 2db to 18db gain range, 0.125db gain steps ltc5585 700mhz to 3ghz iq demodulator >530mhz iq bandwidth, 25.7dbm iip3, iip2 adjustable to >80dbm, dc offset null adjustment ltc5590 dual 600mhz to 1.7ghz downconverting mixer 8.7db gain, 26dbm iip3, 9.7db noise figure ltc5591 dual 1.3ghz to 2.3ghz downconverting mixer 8.5db gain, 26.2dbm iip3, 9.9db noise figure ltc5592 dual 1.6ghz to 2.7ghz downconverting mixer 8.3db gain, 27.3dbm iip3, 9.8db noise figure rf pll/synthesizer with vco ltc6946-1 low noise, low spurious integer-n pll with integrated vco 373mhz to 3.74ghz, C157dbc/hz wb phase noise floor, C100dbc/hz closed-loop phase noise ltc6946-2 low noise, low spurious integer-n pll with integrated vco 513mhz to 4.9ghz, C157dbc/hz wb phase noise floor, C100dbc/hz closed-loop phase noise ltc6946-3 low noise, low spurious integer-n pll with integrated vco 640mhz to 5.79ghz, C157dbc/hz wb phase noise floor, C100dbc/hz closed-loop phase noise adcs LTC2145-14 14-bit, 125msps 1.8v dual adc 73.1db snr, 90db sfdr, 95mw/ch power consumption ltc2185 16-bit, 125msps 1.8v dual adc 76.8db snr, 90db sfdr, 185mw/channel power consumption ltc2158-14 14-bit, 310msps 1.8v dual adc, 1.25ghz full-power bandwidth 68.8dbfs snr, 88db sfdr, 362mw/ch power consumption, 1.32v p-p input range

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